Many conventional integrated circuit (“IC”) packages suffer from delamination after exposure to certain environmental conditions for an amount of time. For example, many IC packages experience delamination after the moisture loading requirement of 85° C. & 85% humidity for a duration of 168 hours, as specified by JEDEC MSL (“Moisture Sensitivity Level”) testing. As used herein, “delamination” may refer to a separation between areas of the lead frame (which may be silver plated, in some devices) and an adjacent structure or material (e.g., mold compound or die/IC chip), which may result from poor adhesion between the lead frame and the adjacent structure or material, for example. Delamination may affect the IC packaging, resulting in package and wire bond weaknesses during reliability testing, such as when stress is applied to the package, e.g., due to moisture, temperature or humidity. Delamination may also result in product field failures such as broken or lifted wire bonds.
Thus, there is a need for reducing or eliminating lead frame delamination in IC packages, e.g., SOIC (Small Outline Integrated Circuit) packages. As an example only, there is a need for reducing or eliminating lead frame delamination, e.g., inner lead delamination, in 8-lead SOIC (SOIC-8) and 28-lead SOIC (SOIC-28) semiconductor device housings. The JEDEC requirement (JEDEC J-STD-020E) mandates zero delamination on wire bonding areas using palladium coated copper wire at MSL 1, which rating indicates that the devices is not moisture sensitive. Components must be mounted and reflowed within the allowable period of time (floor life out of the bag). One way to reduce or eliminate the leadfinger delamination is to downgrade the devices to MSL3, which rating defines a maximum of one week exposure to ambient conditions before the device is assembled on a PCB. However, this typically adds substantial cost to the parts and requires special handling of the parts by the customer when removing the parts from moisture barrier bags.